Special Sessions


Date/Time Title
SS-1 Tuesday, January 14,
14:00-15:40
Designing Reliable and Robust Circuits and Systems in the Nanometer Era
SS-2 Wednesday, January 15,
15:45-17:00
Computation-in-Memory based on emerging non-volatile memories: Technology, design, and test and reliability
SS-3 Wednesday, January 15,
15:45-17:00
Emerging Memory Enabled Computing in The Post-Moore’s Era
SS-4 Wednesday, January 15,
15:45-17:00
AI Enhanced Simulation and Optimization in Back-End EDA Flow
SS-5 Thursday, January 16,
15:45-17:00
Resilience in Integrated Systems
SS-6 Thursday, January 16,
15:45-17:00
Emerging Technologies across the Abstraction Layers
SS-7 Thursday, January 16,
15:45-17:00
CMOS Annealing Hardware: Pursuing Efficiency for Solving Combinatorial Optimization Problems

SS-1: Designing Reliable and Robust Circuits and Systems in the Nanometer Era

  • Organizer: Sheldon Tan (Univ. of California Riverside, USA)
  • Time: 14:00 - 15:40, Tuesday, January 14, 2020
  • Location: Room 310
  1. (Invited Paper) Impact of Self-Heating On Performance, Power and Reliability in FinFET Technology
    Victor M. van Santen, Paul R. Genssler, Om Prakash, Simon Thomann, Jörg Henkel, *Hussam Amrouch (Karlsruhe Inst. of Tech., Germany)
  2. (Invited Paper) Reliable Power Grid Network Design Framework Considering EM Immortalities for Multi-Segment Wires
    Han Zhou, Shuyuan Yu, Zeyu Sun, *Sheldon Tan (Univ. of California, Riverside, USA)
  3. (Invited Paper) Investigating the Inherent Soft Error Resilience of Embedded Applications by Full-System Simulation
    Uzair Sharif, Daniel Müller-Gritschneder, *Ulf Schlichtmann (Tech. Univ. of Munich, Germany)

SS-2: Computation-in-Memory based on emerging non-volatile memories: Technology, design, and test and reliability

  • Organizer: Mehdi Tahoori (Faculty of Informatik, Karlsruhe Inst. of Tech. (KIT), Germany)
  • Time: 15:45 - 17:00,Wednesday, January 15, 2020
  • Location: Room 310
  1. (Invited Paper) Emerging Non-VolatileMemories for Computation-in-Memory
    *Bin Gao (Tsinghua Univ., China)
  2. (Invited Paper) The Power of Computation-in-Memory Based on Memristive Devices
    *Jintao Yu, Muath Abu Lebdeh, Hoang Anh Du Nguyen, Mottaqiallah Taouil, Said Hamdioui (Delft Univ. of Tech., Netherlands)
  3. (Invited Paper) Tolerating Retention Failures in Neuromorphic Fabric based on Emerging Resistive Memories
    ChristopherMünch (Karlsruhe Inst. of Tech., Germany), Rajendra Bishnoi (Delft Univ. of Tech., Netherlands), *Mehdi B. Tahoori (Karlsruhe Inst. of Tech., Germany)

SS-3: EmergingMemory Enabled Computing in The Post-Moore’s Era

  • Organizer: Xueqing Li (Tsinghua Univ., China)
  • Time: 15:45 - 17:25,Wednesday, January 15, 2020
  • Location: Room 308
  1. (Invited Paper) Ferroelectrics: From Memory to Computing
    *Kai Ni (Rochester Inst. of Tech., USA), Sourav Dutta, Suman Datta (Univ. of Notre Dame, USA)
  2. (Invited Paper) Adaptive Circuit Approaches to Low-Power Multi-Level/Cell FeFET Memory
    Juejian Wu, Yixin Xu, Bowen Xue, Yu Wang, Yongpan Liu, Huazhong Yang, *Xueqing Li (Tsinghua Univ., China)
  3. (Invited Paper) EmergingMemories as Enablers for In-Memory Layout Transformation Acceleration and Virtualization
    Minli Liao, *John (Jack) Sampson (Pennsylvania State Univ., USA)
  4. (Invited Paper) BenchmarkNon-volatile and VolatileMemory Based Hybrid Precision Synapses for In-situ Deep Neural Network Training
    Yandong Luo, *Shimeng Yu (Georgia Tech, USA)

SS-4: AI Enhanced Simulation and Optimization in Back-End EDA Flow

  • Organizer: Wenjian Yu (Tsinghua Univ., China)
  • Time: 15:45 - 17:00,Wednesday, January 15, 2020
  • Location: Room 307A
  1. (Invited Paper) Capacitance Extraction and Power Grid Analysis Using Statistical and AI Methods
    *Wenjian Yu, Ming Yang, Yao Feng, Ganqu Cui (Tsinghua Univ., China), Ben Gu (Tsinghua Univ., USA)
  2. (Invited Paper) VLSI Mask Optimization: From Shallow To Deep Learning
    *Haoyu Yang (Chinese Univ. of Hong Kong, Hong Kong),Wei Zhong (Dalian Univ. of Tech., China), Yuzhe Ma, Hao Geng, Ran Chen,Wanli Chen, Bei Yu (Chinese Univ. of Hong Kong, Hong Kong)
  3. (Invited Paper) BayesianMethods for the Yield Optimization of Analog and SRAMCircuits
    Shuhan Zhang, *Fan Yang (Fudan Univ., China), Dian Zhou (Univ. of Texas, Dallas, USA), Xuan Zeng (Fudan Univ., China)

SS-5: Resilience in Integrated Systems

  • Organizer: Masanori Hashimoto (Osaka Univ., Japan)
  • Time: 15:45 - 17:00, Thursday, January 16, 2020
  • Location: Room 310
  1. (Invited Paper) Soft Error and Its Countermeasures in Terrestrial Environment
    *Masanori Hashimoto (Osaka Univ., Japan),Wang Liao (Kochi Univ. of Tech., Japan)
  2. (Invited Paper) Timing Resilience for Efficient and Secure Circuits
    Grace Li Zhang, Michaela Brunner, *Bing Li, Georg Sigl, Ulf Schlichtmann (Tech. Univ. of Munich, Germany)
  3. (Invited Paper) Run-Time Enforcement of Non-Functional Application Requirements in Heterogeneous Many-Core Systems
    Jürgen Teich, Behnaz Pourmohseni, *Oliver Keszocze, Jan Spieck, StefanWildermann (Friedrich-Alexander- Univ. Erlangen-Nürnberg (FAU), Germany)

SS-6: Emerging Technologies across the Abstraction Layers

  • Organizer: Hussam Amrouch (Karlsruhe Inst. of Tech. (KIT), Germany)
  • Time: 15:45 - 17:00, Thursday, January 16, 2020
  • Location: Room 308
  1. (Invited Paper) NCFET to Rescue Technology Scaling: Opportunities and Challenges
    *Hussam Amrouch, Victor M. van Santen (Karlsruhe Inst. of Tech., Germany), Girish Pahwa (Indian Inst. of Tech. Kanpur, India), Yogesh Chauhan (Indian Inst. of Tech. Kanpur, Germany), Jörg Henkel (Karlsruhe Inst. of Tech. (KIT), Germany)
  2. (Invited Paper) Parallelism in Deep Learning Accelerators
    *Linghao Song, Fan Chen, Yiran Chen, Hai (Helen) Li (Duke Univ., USA)
  3. (Invited Paper) Software-BasedMemory Analysis Environments for In-MemoryWear-Leveling
    *Christian Hakert, Kuan-Hsun Chen, Mikail Yayla, Georg von der Brueggen, Sebastian Bloemeke, Jian-Jia Chen (TU Dortmund, Germany)

SS-7: CMOS Annealing Hardware: Pursuing Efficiency for Solving Combinatorial Optimization Problems

  • Organizer: Shu Tanaka (Waseda Univ., Japan)
  • Time: 15:45 - 17:00, Thursday, January 16, 2020
  • Location: Room 307A
  1. (Invited Paper) Digital Annealer for High-Speed Solving of CombinatorialOptimization Problems and Its Applications
    *SatoshiMatsubara,MotomuTakatsu, ToshiyukiMiyazawa, Takayuki Shibasaki, YasuhiroWatanabe, Kazuya Takemoto, Hirotaka Tamura (Fujitsu Labs., Japan)
  2. (Invited Paper) CMOS AnnealingMachine: A Domain-Specific Architecture for Combinatorial Optimization Problem
    *Chihiro Yoshimura, Masato Hayashi, Takashi Takemoto,Masanao Yamaoka (Hitachi, Japan)
  3. (Invited Paper) Theory of Ising Machines and a Common Software Platform for IsingMachines
    *Shu Tanaka (Waseda Univ., Japan), Yoshiki Matsuda (Fixstars, Japan), Nozomu Togawa (Waseda Univ., Japan)
Last Updated on: Jan 13, 2020